Used with -Vestel
17MB120JVC LT43C862, Vestel 4K Smart55UA8300, Telefunken D55U400, Hitachi
55HK6T74UA, Hitachi 43F501HG2W69, Hitachi 48HK6T74U, Poloroid P43UP0117A,
Toshiba 55U6663DB, Philips 49PUS6031, Bush LED49292UHHDFVP and many more brand
LED TVs
MICROCONTROLLER (MSTAR MSD95M0D)
The Si2151 is Silicon Labs' sixth-generation hybrid TV tuner supporting all worldwide terrestrial and cable TV standards. Requiring no external balun, SAW filters, wire wound inductors or LNAs, the Si2151 offers the lowest-cost BOM for a hybrid TV tuner. Also included are an integrated power-on reset circuit and an option for single power supply operation. As with prior-generation Silicon Labs TV tuners, the Si2151 maintains very high linearity and low noise to deliver superior picture quality and a higher number of received stations when compared to other silicon tuners. The Si2151 offers increased immunity to WiFi and LTE interference, eliminating the need for external filtering. For the best performance with next-generation digital TV standards, such as DVB-T2/C2, the Si2151 delivers industry-leading phase noise performance.
MAIN AMPLIFIER (U8) (10W/12W OPTİONS)
AD82587D is a digital audio amplifier capable of driving a pair of 8 ohm, 20W or a single 4 ohm, 40W speaker, both which operate with play music at a 24V supply without external heat-sink or fan requirement.
Using I2C digital control interface, the user can control AD82587D’s input format selection, DRC (dynamic range control), mute and volume control functions. AD82587D has many built-in protection circuits to safeguard AD82587D from connection errors.
SUBWOOFER AMPLIFIER (U9) (12 W)
AD82586C is a digital audio amplifier capable of driving a pair of 8 ohm, 20W operating at 24V supply without external heat-sink or fan requirement with play music.
AD82586C has 20 bands EQ function and can operate 20W stereo or 40W mono optionally.
AD82586C can provide advanced audio processing capabilities, such as volume control, 20 bands speaker EQ, audio mixing, 3D surround and DRC (dynamic range control). These functions are fully programmable via a simple I2C control interface.
The Si2151 is Silicon Labs' sixth-generation hybrid TV tuner supporting all worldwide terrestrial and cable TV standards. Requiring no external balun, SAW filters, wire wound inductors or LNAs, the Si2151 offers the lowest-cost BOM for a hybrid TV tuner. Also included are an integrated power-on reset circuit and an option for single power supply operation. As with prior-generation Silicon Labs TV tuners, the Si2151 maintains very high linearity and low noise to deliver superior picture quality and a higher number of received stations when compared to other silicon tuners. The Si2151 offers increased immunity to WiFi and LTE interference, eliminating the need for external filtering. For the best performance with next-generation digital TV standards, such as DVB-T2/C2, the Si2151 delivers industry-leading phase noise performance.
MAIN AMPLIFIER (U8) (10W/12W OPTİONS)
AD82587D is a digital audio amplifier capable of driving a pair of 8 ohm, 20W or a single 4 ohm, 40W speaker, both which operate with play music at a 24V supply without external heat-sink or fan requirement.
Using I2C digital control interface, the user can control AD82587D’s input format selection, DRC (dynamic range control), mute and volume control functions. AD82587D has many built-in protection circuits to safeguard AD82587D from connection errors.
SUBWOOFER AMPLIFIER (U9) (12 W)
AD82586C is a digital audio amplifier capable of driving a pair of 8 ohm, 20W operating at 24V supply without external heat-sink or fan requirement with play music.
AD82586C has 20 bands EQ function and can operate 20W stereo or 40W mono optionally.
AD82586C can provide advanced audio processing capabilities, such as volume control, 20 bands speaker EQ, audio mixing, 3D surround and DRC (dynamic range control). These functions are fully programmable via a simple I2C control interface.
Robust protection
circuits are provided to protect AD82586C from damage due to accidental
erroneous operating condition. AD82586C is more tolerant to noise and PVT
(Process, Voltage, and Temperature) variation than the analog Class-AB or
Class-D audio amplifier counterpart implemented by analog circuit design.
AD82586C is pop free during instantaneous power switch because of its built-in,
robust anti-pop circuit.
HEADPHONE AMPLIFIER (U59)
The AD22657B is a 2-Vrms cap-less stereo line driver. The device is ideal for single supply electronics.
Cap-less design can eliminate output dc-blocking capacitors for better low frequency response and save cost.
The AD22657B is capable of delivering 2-Vrms output into a 10k ohm load with 3.3V supply. The gain settings can be set by users from 1V/V to 10V/V externally. The AD22657B has under voltage protection to prevent POP noise. Build-in shutdown control and de-pop control sequence also help AD22657B to be a pop less device.
The AD22657B is available in a 10-pin MSOP package.
Power socket is used for taking voltages which are 12V, 5V and VDD_Audio. These voltages are produced in power board. Also socket is used for giving dimming, backlight and standby signals with power board. It is shown at figure.
HEADPHONE AMPLIFIER (U59)
The AD22657B is a 2-Vrms cap-less stereo line driver. The device is ideal for single supply electronics.
Cap-less design can eliminate output dc-blocking capacitors for better low frequency response and save cost.
The AD22657B is capable of delivering 2-Vrms output into a 10k ohm load with 3.3V supply. The gain settings can be set by users from 1V/V to 10V/V externally. The AD22657B has under voltage protection to prevent POP noise. Build-in shutdown control and de-pop control sequence also help AD22657B to be a pop less device.
The AD22657B is available in a 10-pin MSOP package.
Power socket is used for taking voltages which are 12V, 5V and VDD_Audio. These voltages are produced in power board. Also socket is used for giving dimming, backlight and standby signals with power board. It is shown at figure.
VDD_Audio goes directly to the audio side,
through power socket other incoming voltages from power card are converted
several voltages.
TPS54528
The TPS54528 is an adaptive on-time D-CAP2 mode synchronous buck converter.The TPS54528 enables system designers to complete the suite of various end-equipment power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54528 uses the D-CAP2 mode control that provides a fast transient response with no external compensation components. The adaptive on-time control supports seamless transition between PWM mode at higher load conditions and Eco-mode operation at light loads. Eco-mode allows the TSP54528 to maintain high efficiency during lighter load conditions. The TPS54528 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR)output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.
The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 6 V. The device also features an adjustable soft start time. The TPS54528 is available in the 8-pin DDA package, and designed to operate from -40 C to 85 C.
TPS54628
The TPS54628 is an adaptive on-time D-CAP2 mode synchronous buck converter. The TPS54628 enables system designers to complete the suite of various end-equipment power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54628 uses the D-CAP2 mode control that provides a fast transient response with no external compensation components. The adaptive on-time control supports seamless transition between PWM mode at higher load conditions and Eco-mode operation at light loads. Eco-mode allows the TSP54628 to maintain high efficiency during lighter load conditions. The TPS54628 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR)output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.
The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54628 is available in the 8-pin DDA and 10-pin DRC packages, and is designed to operate over the ambient temperature range of -40C to 85C.
TPS54821
The TPS54821 in thermally enhanced 3.5 mm x 3.5 mm QFN package is a full featured 17 V, 8 A synchronous step down converter which is optimized for small designs through high efficiency and integrating the high-side and low-side MOSFETs. Further space savings are achieved through current mode control, which reduces component count, and by selecting a high switching frequency, reducing the inductor's footprint. The output voltage startup ramp is controlled by the SS/TR pin which allows operation as either a stand-alone power supply or in tracking situations. Power sequencing is also possible by correctly configuring the enable and the open drain power good pins. Cycle by cycle current limiting on the high-side FET protects the device in overload situations and is enhanced by a low-side sourcing current limit which prevents current runaway. There is also a low-side sinking current limit which turns off the low-side MOSFET to prevent excessive reverse current. Hiccup protection will be triggered if the overcurrent condition has persisted for longer than the preset time. Thermal hiccup protection disables the device when the die temperature exceeds the thermal shutdown temperature and enables the part again after the built-in thermal shutdown hiccup time.
FDS4685
This P-Channel MOSFET is a rugged gate version of Fairchild Semiconductor’s advanced Power Trench process. It has been optimized for power management applications requiring a wide range of gate drive voltage ratings (4.5V – 20V).
APL5910
The APL5910 is a 1A ultra low dropout linear regulator. The IC needs two supply voltages, one is a control voltage (VCNTL) for the control circuitry, the other is a main supply voltage (VIN) for power conversion, to reduce power dissipation and provide extremely low dropout voltage. The APL5910 integrates many functions.
A Power-On- Reset (POR) circuit monitors both supply voltages on VCNTL and VIN pins to prevent erroneous operations. The functions of thermal shutdown and current-limit protect the device against thermal and current over-loads. A POK indicates that the output voltage status with a delay time set internally. It can control other converter for power sequence. The APL5910 can be enabled by other power systems. Pulling and holding the EN voltage below 0.4V shuts off the output.
The APL5910 is available in a SOP-8P package which features small size as SOP-8 and an Exposed Pad to reduce the junction-to-case resistance to extend power range of applications.
HYNİX H5TQ2G63GFR: 2GB DDR3 SDRAM
The H5TQ2G83GFR-xxC, H5TQ2G63GFR-xxC, H5TQ2G83GFR-xxI, H5TQ2G63GFR-xxI, H5TQ2G83GFRxxL, H5TQ2G63GFR-xxL, H5TQ2G83GFR-xxJ, H5TQ2G63GFR-xxJ are a 2, 147, 483, 648-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. SK Hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit pre-fetched to achieve very high bandwidth.
HYNİX H5TQ4G63GFR: 4GB DDR3L SDRAM
The H5TC4G83CFR-xxA(I,L,J),H5TQC4G63CFR-xxA(I,L,J) are a 4Gb low power Double Data Rate III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density, high bandwidth and low power operation at 1.35V. SK Hynix DDR3L SDRAM provides backward compatibility with the 1.5V DDR3 based environment without any changes. SK Hynix 4Gb DDR3L SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the clock (falling edges of the clock), data, data strobes and write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipe lined. and 8-bit prefetched to achieve very high bandwidth.
MT29F4G08ABAEAWP: 32GBIT (4G X 8 BIT) NAND FLASH MEMORY
Micron NAND Flash devices include an asynchronous data interface for high-performance I/O operations.These devices use a highly multiplexed 8-bit bus (I/Ox) to transfer commands, address, and data. There are five control signals used to implement the asynchronous data interface: CE#, CLE, ALE, WE#, and RE#. Additional signals control hardware write protection and monitor device status (R/B#).This hardware interface creates a low pin-count device with a standard pin out that remains the same from one density to another, enabling future upgrades to higher densities with no board redesign. A target is the unit of memory accessed by a chip enable signal.
A target contains one or more NAND Flash die. A NAND Flash die is the minimum unit that can independently execute commands and report status. A NAND Flash die, in the ONFI specification, is referred to as a logical unit (LUN). There is at least one NAND Flash die per chip enable signal.
MX25L1606E SPI FLASH: 16M-BIT [16M X 1] CMOS SERIAL FLASH EEPROM
The device feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input.
When it is in Dual Output read mode, the SI and SO pins become SIO0 and SIO1 pins for data output.The device provides sequential read operation on whole chip. After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page basis, or word basis for erase command is executes on sector, or block, or whole chip basis.To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit. Advanced security features enhance the protection and security functions. When the device is not in operation and CS# is high, it is put in standby mode. The device utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after typical 100,000 program and erase cycles.
M25Q32FV SPI FLASH
This W25Q32FV (32M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices.
They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as low as 4mA active and 1uA for power-down. All devices are offered in space-saving packages.
The W25Q32FV array is organized into 16,384 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q32FV has 1,024 erasable sectors and 64 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage.
The W25Q32FV support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI as well as 2-clocks instruction cycle Quad Peripharel Interface (QPI): Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (D0), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Duad I/O and 416Mhz (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O and QPI instructions. These transfer rates can outperform standard Asynchronous 8 an 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory Access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP(execute in place) operation.
MSB1246 DVB-T2
The MSB1246 is a single chip demodulator supporting DVB-T2, DVB-T, DVB-C, DVB-S2 and DVB-S standards. The device integrates a house keeping microcontroller that takes care of all real time and algorithmic tasks simplifying the host control interface.
For DVB-T2/T/C, the MSB1246 front end can accept tuners that provide IF or low IF output. For DVBS2/S, the MSB1246 front end can accept tuners that provide zero-IF output. A high rejection channel filter has been included easing the channel filtering requirement of the tuner whilst still meeting the stringent requirements for adjacent channel interference. The MSB1246 may be clocked directly using a crystal, typically 24MHz.
The MSB1246 is capable of blind acquisition of DVB-T/T2, DVB-C and DVB-S2/S signals. All parameters may be detected in this mode enabling fast and accurate auto scanning. Its frequency recovery circuit is able to compensate for all typical tuner and broadcast frequency errors.
TPS65233: LNB SUPPLY AND CONTROL IC
Designed for analog and digital satellite receivers, the TPS65233 is a monolithic voltage regulator with I2C interface, specifically to provide the 13-V/18-V power supply and the 22-kHz tone signaling to the LNB down converter in the antenna dish or to the multi-switch box. It offers a complete solution with very low component count, low power dissipation together with simple design and I2C standard interfacing. TPS65233 features high power efficiency. The boost converter integrates a 120-mΩ power MOSFET running at 500-kHz switching frequency. Drop out voltage at the linear regulator is 0.8 V to minimize power loss. TPS65233 provides multiple ways to generate the 22-kHz signal. Integrated linear regulator with push-pull output stage generates clean 22-kHz tone signal superimposed at the output even at zero loading. Current limit of linear regulator can be programmed by external resistor with ±10% accuracy. Full range of diagnostic read by I2C is available for system monitoring.
MAIN SW UPDATE
In MB120 project, follow software update procedure:
1. mb120_en.bin, RomBoot.bin, PM51.bin and usb_auto_update_G6F.txt documents should be copied directly inside of a flash memory (not in a folder).
2. Insert flash memory to the TV when TV is powered off.
3. While pushing the OK button in remote control, power on and wait. TV will power-up itself.
4. If First Time Installation screen comes, it means software update procedure is successful.
NO BACKLİGHT PROBLEM
If TV is working, led is normal and there is no picture and back light on the panel.
Possible causes: Back-light pin, dimming pin, back-light supply, stby on/off pin BACK-LIGHT_ON/OFF pin should be high when the backlight is ON. R89 must be low when the back-light is OFF. If it is a problem, check Q10 and the panel cables. Also it can be tested in TP137 on main board.
Dimming pin should be high or square wave in open position. If it is low, please check S97 for Mstar side and panel or power cables, connectors.
Back-light power supply should be in panel specs. Please check Q44, shown below; also it can be checked TP175.
STBY_ON/OFF_NOT should be low for tv on condition, please check Q23’s collector.
TPS54528
The TPS54528 is an adaptive on-time D-CAP2 mode synchronous buck converter.The TPS54528 enables system designers to complete the suite of various end-equipment power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54528 uses the D-CAP2 mode control that provides a fast transient response with no external compensation components. The adaptive on-time control supports seamless transition between PWM mode at higher load conditions and Eco-mode operation at light loads. Eco-mode allows the TSP54528 to maintain high efficiency during lighter load conditions. The TPS54528 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR)output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.
The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 6 V. The device also features an adjustable soft start time. The TPS54528 is available in the 8-pin DDA package, and designed to operate from -40 C to 85 C.
TPS54628
The TPS54628 is an adaptive on-time D-CAP2 mode synchronous buck converter. The TPS54628 enables system designers to complete the suite of various end-equipment power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54628 uses the D-CAP2 mode control that provides a fast transient response with no external compensation components. The adaptive on-time control supports seamless transition between PWM mode at higher load conditions and Eco-mode operation at light loads. Eco-mode allows the TSP54628 to maintain high efficiency during lighter load conditions. The TPS54628 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR)output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.
The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54628 is available in the 8-pin DDA and 10-pin DRC packages, and is designed to operate over the ambient temperature range of -40C to 85C.
TPS54821
The TPS54821 in thermally enhanced 3.5 mm x 3.5 mm QFN package is a full featured 17 V, 8 A synchronous step down converter which is optimized for small designs through high efficiency and integrating the high-side and low-side MOSFETs. Further space savings are achieved through current mode control, which reduces component count, and by selecting a high switching frequency, reducing the inductor's footprint. The output voltage startup ramp is controlled by the SS/TR pin which allows operation as either a stand-alone power supply or in tracking situations. Power sequencing is also possible by correctly configuring the enable and the open drain power good pins. Cycle by cycle current limiting on the high-side FET protects the device in overload situations and is enhanced by a low-side sourcing current limit which prevents current runaway. There is also a low-side sinking current limit which turns off the low-side MOSFET to prevent excessive reverse current. Hiccup protection will be triggered if the overcurrent condition has persisted for longer than the preset time. Thermal hiccup protection disables the device when the die temperature exceeds the thermal shutdown temperature and enables the part again after the built-in thermal shutdown hiccup time.
FDS4685
This P-Channel MOSFET is a rugged gate version of Fairchild Semiconductor’s advanced Power Trench process. It has been optimized for power management applications requiring a wide range of gate drive voltage ratings (4.5V – 20V).
APL5910
The APL5910 is a 1A ultra low dropout linear regulator. The IC needs two supply voltages, one is a control voltage (VCNTL) for the control circuitry, the other is a main supply voltage (VIN) for power conversion, to reduce power dissipation and provide extremely low dropout voltage. The APL5910 integrates many functions.
A Power-On- Reset (POR) circuit monitors both supply voltages on VCNTL and VIN pins to prevent erroneous operations. The functions of thermal shutdown and current-limit protect the device against thermal and current over-loads. A POK indicates that the output voltage status with a delay time set internally. It can control other converter for power sequence. The APL5910 can be enabled by other power systems. Pulling and holding the EN voltage below 0.4V shuts off the output.
The APL5910 is available in a SOP-8P package which features small size as SOP-8 and an Exposed Pad to reduce the junction-to-case resistance to extend power range of applications.
HYNİX H5TQ2G63GFR: 2GB DDR3 SDRAM
The H5TQ2G83GFR-xxC, H5TQ2G63GFR-xxC, H5TQ2G83GFR-xxI, H5TQ2G63GFR-xxI, H5TQ2G83GFRxxL, H5TQ2G63GFR-xxL, H5TQ2G83GFR-xxJ, H5TQ2G63GFR-xxJ are a 2, 147, 483, 648-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. SK Hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit pre-fetched to achieve very high bandwidth.
HYNİX H5TQ4G63GFR: 4GB DDR3L SDRAM
The H5TC4G83CFR-xxA(I,L,J),H5TQC4G63CFR-xxA(I,L,J) are a 4Gb low power Double Data Rate III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density, high bandwidth and low power operation at 1.35V. SK Hynix DDR3L SDRAM provides backward compatibility with the 1.5V DDR3 based environment without any changes. SK Hynix 4Gb DDR3L SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the clock (falling edges of the clock), data, data strobes and write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipe lined. and 8-bit prefetched to achieve very high bandwidth.
MT29F4G08ABAEAWP: 32GBIT (4G X 8 BIT) NAND FLASH MEMORY
Micron NAND Flash devices include an asynchronous data interface for high-performance I/O operations.These devices use a highly multiplexed 8-bit bus (I/Ox) to transfer commands, address, and data. There are five control signals used to implement the asynchronous data interface: CE#, CLE, ALE, WE#, and RE#. Additional signals control hardware write protection and monitor device status (R/B#).This hardware interface creates a low pin-count device with a standard pin out that remains the same from one density to another, enabling future upgrades to higher densities with no board redesign. A target is the unit of memory accessed by a chip enable signal.
A target contains one or more NAND Flash die. A NAND Flash die is the minimum unit that can independently execute commands and report status. A NAND Flash die, in the ONFI specification, is referred to as a logical unit (LUN). There is at least one NAND Flash die per chip enable signal.
MX25L1606E SPI FLASH: 16M-BIT [16M X 1] CMOS SERIAL FLASH EEPROM
The device feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input.
When it is in Dual Output read mode, the SI and SO pins become SIO0 and SIO1 pins for data output.The device provides sequential read operation on whole chip. After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page basis, or word basis for erase command is executes on sector, or block, or whole chip basis.To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit. Advanced security features enhance the protection and security functions. When the device is not in operation and CS# is high, it is put in standby mode. The device utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after typical 100,000 program and erase cycles.
M25Q32FV SPI FLASH
This W25Q32FV (32M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices.
They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as low as 4mA active and 1uA for power-down. All devices are offered in space-saving packages.
The W25Q32FV array is organized into 16,384 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q32FV has 1,024 erasable sectors and 64 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage.
The W25Q32FV support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI as well as 2-clocks instruction cycle Quad Peripharel Interface (QPI): Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (D0), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Duad I/O and 416Mhz (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O and QPI instructions. These transfer rates can outperform standard Asynchronous 8 an 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory Access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP(execute in place) operation.
MSB1246 DVB-T2
The MSB1246 is a single chip demodulator supporting DVB-T2, DVB-T, DVB-C, DVB-S2 and DVB-S standards. The device integrates a house keeping microcontroller that takes care of all real time and algorithmic tasks simplifying the host control interface.
For DVB-T2/T/C, the MSB1246 front end can accept tuners that provide IF or low IF output. For DVBS2/S, the MSB1246 front end can accept tuners that provide zero-IF output. A high rejection channel filter has been included easing the channel filtering requirement of the tuner whilst still meeting the stringent requirements for adjacent channel interference. The MSB1246 may be clocked directly using a crystal, typically 24MHz.
The MSB1246 is capable of blind acquisition of DVB-T/T2, DVB-C and DVB-S2/S signals. All parameters may be detected in this mode enabling fast and accurate auto scanning. Its frequency recovery circuit is able to compensate for all typical tuner and broadcast frequency errors.
TPS65233: LNB SUPPLY AND CONTROL IC
Designed for analog and digital satellite receivers, the TPS65233 is a monolithic voltage regulator with I2C interface, specifically to provide the 13-V/18-V power supply and the 22-kHz tone signaling to the LNB down converter in the antenna dish or to the multi-switch box. It offers a complete solution with very low component count, low power dissipation together with simple design and I2C standard interfacing. TPS65233 features high power efficiency. The boost converter integrates a 120-mΩ power MOSFET running at 500-kHz switching frequency. Drop out voltage at the linear regulator is 0.8 V to minimize power loss. TPS65233 provides multiple ways to generate the 22-kHz signal. Integrated linear regulator with push-pull output stage generates clean 22-kHz tone signal superimposed at the output even at zero loading. Current limit of linear regulator can be programmed by external resistor with ±10% accuracy. Full range of diagnostic read by I2C is available for system monitoring.
MAIN SW UPDATE
In MB120 project, follow software update procedure:
1. mb120_en.bin, RomBoot.bin, PM51.bin and usb_auto_update_G6F.txt documents should be copied directly inside of a flash memory (not in a folder).
2. Insert flash memory to the TV when TV is powered off.
3. While pushing the OK button in remote control, power on and wait. TV will power-up itself.
4. If First Time Installation screen comes, it means software update procedure is successful.
NO BACKLİGHT PROBLEM
If TV is working, led is normal and there is no picture and back light on the panel.
Possible causes: Back-light pin, dimming pin, back-light supply, stby on/off pin BACK-LIGHT_ON/OFF pin should be high when the backlight is ON. R89 must be low when the back-light is OFF. If it is a problem, check Q10 and the panel cables. Also it can be tested in TP137 on main board.
Dimming pin should be high or square wave in open position. If it is low, please check S97 for Mstar side and panel or power cables, connectors.
Back-light power supply should be in panel specs. Please check Q44, shown below; also it can be checked TP175.
STBY_ON/OFF_NOT should be low for tv on condition, please check Q23’s collector.
CI MODULE PROBLEM
CI is not working when CI module inserted.
Possible couses: Supply, suply control pin, detect pins, mechanical positions of pins.
CI supply should be 5V when CI module inserted. If it is not 5V please check CI_PWR_CTRL, this pin should be low. Check mechanical position of CI module. Is it inserted properly or not?
Detect ports should be low. If it is not low check CI connector pins, CI module pins.
CI is not working when CI module inserted.
Possible couses: Supply, suply control pin, detect pins, mechanical positions of pins.
CI supply should be 5V when CI module inserted. If it is not 5V please check CI_PWR_CTRL, this pin should be low. Check mechanical position of CI module. Is it inserted properly or not?
Detect ports should be low. If it is not low check CI connector pins, CI module pins.
STAYİNG İN STAND-BY MODE
Staying in stand-by mode, no other operation
This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal operation.
When there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV set and control voltage points with a multimeter to find the shorted voltage to ground.
Staying in stand-by mode, no other operation
This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal operation.
When there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV set and control voltage points with a multimeter to find the shorted voltage to ground.
NO SOUND PROBLEM
No audio at main TV speaker outputs.
Check supply voltages of 24V_VCC, VDD_AUDIO_MAIN and 3.3V_AMP with a voltage-meter. There may be a problem in headphone connector or headphone detect circuit (when headphone is connected, speakers are automatically muted). Measure voltage at HP_DETECT pin, it should be 3.3v.
STANDBY ON/OFF PROBLEM
Device can not boot, TV hangs in standby mode.There may be a problem about power supply. Check main supplies with a voltage-meter. Also there may be a problem about SW. Try to update TV with latest SW. Additionally it is good to check SW printouts via Teraterm. These printouts may give a clue about the problem. You can use mini scart for terraterm connection.
NO SİGNAL PROBLEM
No signal in TV mode.
Check tuner supply voltage 3V3_TUNER and. Check tuner options are correctly set in Service menu. Check voltage at TUNER_SCL and TUNER_SDA pin of tuner.
No audio at main TV speaker outputs.
Check supply voltages of 24V_VCC, VDD_AUDIO_MAIN and 3.3V_AMP with a voltage-meter. There may be a problem in headphone connector or headphone detect circuit (when headphone is connected, speakers are automatically muted). Measure voltage at HP_DETECT pin, it should be 3.3v.
STANDBY ON/OFF PROBLEM
Device can not boot, TV hangs in standby mode.There may be a problem about power supply. Check main supplies with a voltage-meter. Also there may be a problem about SW. Try to update TV with latest SW. Additionally it is good to check SW printouts via Teraterm. These printouts may give a clue about the problem. You can use mini scart for terraterm connection.
NO SİGNAL PROBLEM
No signal in TV mode.
Check tuner supply voltage 3V3_TUNER and. Check tuner options are correctly set in Service menu. Check voltage at TUNER_SCL and TUNER_SDA pin of tuner.
Main and Sub-Woofer amplifier
schematic
